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description the A8507 is a multi-output wled/rgb driver for backlighting lcd monitors and televisions. the A8507 integrates a boost controller to drive external mosfet and six internal current-sinks. the boost converter is constant frequency current mode converter. pwm dimming allows led currents to be controlled in 500:1 ratio. the led sinks are capable of sinking up to 80 ma each, and can be paralleled together to achieve even higher currents. the A8507 provides protection against overvoltage, open or shorted led string, and overtemperature. a dual level cycle- by-cycle current limit function provides soft start and protects against overloads. the device is provided in a 24-pin soicw package (lb), with internally fused pins for enhanced thermal dissipation, and a 24-pin tssop package (lp), with an exposed thermal pad for enhanced thermal dissipation. both packages are lead (pb) free, with 100% matte tin leadframe plating. A8507-ds, rev. 2 features and benefits ? fixed frequency current mode control with integrated gate driver ? each individual current sink is capable of 80 ma ? adjustable overvoltage protection (ovp) ? active current sharing between led strings for 0.6% accuracy and matching ? 250 khz to 1 mhz adjustable switching frequency ? open or shorted led string protection ? overtemperature, cycle-by-cycle current limit, and undervoltage protection ? no audible mlcc noise during pwm dimming ? no pull-up resistors required for led modules that use esd capacitors ? soic 24-pin package for easy single-side pcb manufacturing or tssop 24-pin package with exposed thermal pad for better thermal performance led backlight driver for lcd monitors and televisions packages: functional block diagram not to scale A8507 24-pin soicw with internally fused pins (lb package) 24-pin tssop with exposed thermal pad (package lp) led1 osc current mode boost controller en fset pwm vin fault tsd ovp ocp driver senp senn 10 h 2.2 f 4.7 f v bat ovp overvoltage protection led2 led3 led4 led5 led6 control and feedback reference current led select logic open/short led detect 6 6 6 comp ref ocp ss iset 100 k r sc r fset r iset c comp r ovp 10 k 0.1 f control logic/ uvlo +5 v pgnd lgnd pad lp only lb only lgnd gnd gnd p p p p figure 1. functional block diagram showing 6 parallel strings with 9 series leds per channel
led backlight driver for lcd monitors and televisions A8507 2 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com absolute maximum ratings characteristic symbol notes rating unit led output voltage v ledx ?0.3 to 40 v ovp pin input voltage v ovp ?0.3 to 50 v senp and senn pin input voltage v senx ?0.3 to 1 v remaining pins input voltage v in ?0.3 to 7 v operating ambient temperature t a range e ?40 to 85 oc maximum junction temperature t j (max) 150 oc storage temperature t stg ?55 to 150 oc selection guide part number packing package A8507elbtr-t 1000 pieces per 13-in. reel 24-pin soicw, with internally fused pins for enhanced thermal dissipation A8507elptr-t 4000 pieces per 13-in. reel 24-pin tssop, with exposed thermal pad for enhanced thermal dissipation thermal characteristics may require derating at maximum conditions, see application information characteristic symbol test conditions* value unit package thermal resistance r ja package lb, on 2-layer pcb, 1-in. 2 2-oz copper exposed area 51 oc/w package lb, on 4-layer pcb, based on jedec standard 35 oc/w package lp, 4-layer pcb, based on jedec standard 28 oc/w *additional thermal information available on the allegro website
led backlight driver for lcd monitors and televisions A8507 3 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com package lb package lp pin-out diagrams 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 en fault led6 led5 led4 lgnd lgnd led3 led2 led1 comp fset pwm pgnd nc nc senn gnd gnd senp ovp driver vin iset 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 en fault led6 led5 led4 lgnd led3 led2 led1 comp fset gnd gnd pwm nc pgnd nc senn senp ovp nc driver vin iset pad terminal list table number name function lb lp 1 2 pwm pwm led-current control; apply logic level pwm for dimming 2 4 pgnd power ground for external fet gate driver; connect to common star ground and r sc ground 3,4 3,5,9 nc no internal electrical connection to these pins 5 6 senn connect ground side of current sense resistor r sc 6,7 1,13 gnd connect to common star ground 8 7 senp connect high side of current sense resistor r sc 9 8 ovp connect this pin to output capacitor +ve node to enable overvoltage protection; typical ovp level is 36 v, and this level can be increased by connecting through an external resistor r ovp 10 10 driver gate driver terminal to drive external mosfet 11 11 vin input supply for the ic; decouple with a 0.1 f ceramic capacitor 12 12 iset sets 100% current through led strings; connect r iset from iset to gnd 13 14 fset sets switching frequency; connect r fset from fset to gnd 14 15 comp compensation pin; connect 1 f capacitor to gnd or common star ground 15,16,17 16,17,18 ledx led sinks capable of 80 ma sink; connect unused ledx pins to ground 18,19 19 lgnd connect to common star ground 20,21,22 20,21,22 ledx led sinks capable of 80 ma sink; connect unused ledx pins to ground 23 23 f a u l t during normal operation, this pin is high (high impedance); at a fault event, this pin pulls low 24 24 en device enable ? pad pad exposed pad for enhanced thermal dissipation, connect to common star ground
led backlight driver for lcd monitors and televisions A8507 4 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com electrical characteristics valid at v in = 5 v; t a = 25c, r fset = 52 k , r iset = 12.4 k , except indicates specifications guaranteed over the full operating temperature range with t a = t j , unless otherwise noted characteristics symbol test conditions min. typ. 1 max. unit input voltage range v in 4.3 ? 5.5 v undervoltage lockout threshold v uvlo v in falling ? ? 4.0 v undervoltage lockout hysteresis v uvlohys ? 0.1 ? v supply current 2 i vin switching at no load ? 7 ? ma shutdown, en = v il , t a = 25c ? 0.1 1 a standby, en = v ih , pwm = v il , soft start completed ?12ma boost controller switching frequency f sw 0.8 1 1.25 mhz minimum switch off-time t off(min) driver output ? 72 ? ns minimum switch on-time t on(min) driver output ? 72 ? ns logic input levels (en and pwm pins) input voltage level low v il ? ? 0.4 v input voltage level high v ih 1.5 ? ? v input leakage current 2 i in en = pwm = 5 v ? 100 ? a driver section high side gate drive on resistance r ds(on)h measured at v gate = v in / 2 ? 9 ? low side gate drive on resistance r ds(on)l measured at v gate = v in / 2 ? 10 ? driver to gnd resistance during shutdown r sdoff ? 125 ? k sense overcurrent threshold voltage v sen v senp ? v senn 80 95 110 mv led current sinks ledx pin regulation voltage v ledx i led = 80 ma ? 1 ? v i set to i ledx current gain a iset i set = 100 a ? 640 ? a/a iset pin voltage v iset ? 1.235 ? v i set allowable current range 2 i set 41 ? 125 a ledx accuracy 3 err iledx led1 through led6 = 1 v, at 100% current ?3 0.6 3 % ledx matching 4 i ledx led1 through led6 = 1 v, i set = 100 a ?3 0.6 3 % ledx switch leakage current 2 i sl v ledx = 12 v, en = 0 ? 0.1 ? a soft start soft start sense threshold voltage v sens sense voltage for boost switch current sensing ? 28.5 ? mv soft start ledx current limit relative to led 100% current i led(ss) current through enabled ledx pins during soft start ?8?% continued on the next page?
led backlight driver for lcd monitors and televisions A8507 5 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com protection features thermal shutdown threshold t tsd t j rising ? 165 ? c short circuit detect voltage v sc ? 18.7 ? v output overvoltage threshold v ovp r ovp = 0 ? 36 ? v ovp pin leakage current 2 i ovplk v ovp = 22 v, en = v il ? 0.1 ? a overvoltage protection sense current 2 i ovph ? 240 ? a f a u l t pin output leakage 2 i flt v = 5 v ? ? 1 a f a u l t pin output voltage v ol i = 500 a ? ? 0.4 v 1 typical specifications are at t a = 25oc. 2 for input and output current specifications, negative current is defined as coming out of the node or pin (sourcing), positive current is defined as going into the node or pin (sinking). 3 led accuracy is defined as (i set 640 ? i led (av)) / (i set 640), i led (av) measured as the average of i led1 through i led6 . 4 led current matching is defined as (i ledx ? i led (av)) / i led (av), with i led (av) as defined in footnote 3. electrical characteristics (continued) valid at v in = 5 v; t a = 25c, r fset = 52 k , r iset = 12.4 k , except indicates specifications guaranteed over the full operating temperature range with t a = t j , unless otherwise noted characteristics symbol test conditions min. typ. 1 max. unit
led backlight driver for lcd monitors and televisions A8507 6 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com 0 10 20 30 40 50 60 0 20 40 60 80 100 120 average led current (ma) pwm duty cycle(%) v bat (v) 21 16 12 8 54.9 55.0 55.1 55.2 55.3 55.4 55.5 -4 0 -2 0 0 2 0 4 0 6 0 8 0 1 0 0 led current (ma) temperature (c) 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 10 12 14 16 18 20 22 24 26 28 efficiency (%) v bat (v) 6 parallel strings, 12 serial leds each, i led = 55 ma 6 parallel strings, 9 serial leds each, i led = 55 ma 6 parallel strings, 12 serial leds each, i led = 80 ma 6 parallel strings, 9 serial leds each, i led = 80 ma 75 80 85 90 95 100 0 10203040506070809010 0 efficiency (%) pwm duty cycle (%) v bat = 21 v v bat = 16 v v bat = 8 v 0.999 1.000 1.001 1.002 1.003 1.004 1.005 1.006 1.007 10 12 14 16 18 20 22 24 26 28 30 normalized current gain r iset (k ) v bat = 12 v characteristic performance figure 3. efficiency versus pwm duty cycle at various v bat levels, 5 parallel strings with 9 series leds each, i led = 55 ma per channel figure 2. efficiency versus battery voltage at various led configurations, r fset = 105 k (500 khz), r iset = 14.3 k (55 ma) or 10 k (80 ma), q1 = fqb17n08l, l1 = 10 h figure 4. normalized current gain versus r iset , normalized to 1 for r iset = 12.4 k figure 5. led current versus ambient temperature, r iset = 14.3 k figure 6. average led current versus pwm duty cycle at various v bat levels, 6 parallel strings with 9 series leds each, i led = 55 ma per channel, f pwm = 200 hz
led backlight driver for lcd monitors and televisions A8507 7 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com 40 50 60 70 80 90 100 0.1 1 10 100 led current accuracy (%) led current matchiing error (%) pwm duty cycle (%) uncompensated compensated (3 s) 0.50 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 10 20 30 40 50 60 70 80 90 100 pwm duty cycle (%) 50 60 70 80 90 100 110 120 130 140 150 160 170 switching frequency (khz) r fset (k ) 250 350 450 550 650 750 850 950 1050 180 0 10 20 30 40 50 60 70 80 90 led current (ma) 1.027 1.028 1.029 1.030 1.031 1.032 1.033 1.034 f sw (mhz) ambient temperature (c) 10 15 20 25 30 r iset (k ) -- 3 5 -2 0 0 2 0 4 0 6 0 8 0 figure 7. led current versus r iset figure 8. switching frequency versus ambient temperature figure 9. led current accuracy versus pwm duty cycle, led current accuracy normalized to the 100% current level, v bat = 12 v, 6 parallel strings with 9 series leds each, i led = 55 ma per channel f pwm = 200 hz figure 10. led current matching error versus pwm duty cycle, v bat = 12 v, 6 parallel strings with 9 series leds each, i led = 55 ma per channel, f pwm = 200 hz figure 11. switching frequency versus r fset
led backlight driver for lcd monitors and televisions A8507 8 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com fig 12. alternative turn-on and turn-off sequences: (top) v en ?v pwm ?v en , (bottom) v vpwm ?v en ?v pwm , with 6 parallel strings with 9 series leds each, v bat = 12 v, v pwm = 5 v (100% current), v in = 5 v, v en = 5 v, i led = 55 ma per channel turn-on sequence turn-on sequence turn-off sequence turn-off sequence v pwm ? v en ? v in v in ? v en ? v pwm v in ? v pwm ? v en v en ? v pwm ? v in c1: v in , 1 v / div. c2: v pwm , 5 v / div. c3: v en , 5 v / div. c4: i out , 200 ma / div. time: 2 ms / div. c2 c3 c4 c1 t v pwm v pwm v in v in v en v en i out i out c2 c3 c4 c1 t v pwm v pwm v in v in v en v en i out i out v pwm v in v en i out t c2 c3 c4 c1 v pwm v in v en i out c2 c3 c4 c1 t v pwm v in v en i out v pwm v in v en i out typical power sequencing waveforms
led backlight driver for lcd monitors and televisions A8507 9 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com overview the A8507 is a multi-output wled/rgb controller for backlighting medium-size displays. it has a integrated gate driver for driving an external n-channel boost mosfet. the boost controller is fixed frequency current mode converter. the switching frequency can be set in the range from 250 khz to 1 mhz, by an external resistor, r fset , connected between fset and ground. the external mosfet switch is protected by pulse-by-pulse cur- rent limiting. the current limit is independent of duty cycle, and is set using an external sense resistor, r sc . the A8507 has six well-matched current sinks that provide regu- lated current through the leds for uniform display brightness. the boost converter is controlled by monitoring all ledx pins simultaneously and continuously. led current setting the maximum led current can be set, at up to 80 ma/channel, through the iset pin. connect a resistor, r iset , between this pin and ground to set the reference current level, i set . the value of i set (ma) is determined by: i set = 1.235 / r iset (k ) . (1) the resulting current is multiplied internally with a gain of 640 and mirrored on all enabled ledx pins. this sets the maximum current through each ledx, referred as the 100% current . the ledx current can be reduced from the 100% current value by applying an external pwm signal on the pwm pin. boost switching frequency setting connect an external resistor between the fset pin and gnd, to set boost switching frequency, f sw . the value of f sw (mhz) is determined by: f sw = 52 / r fset , (2) where f sw is in mhz and r fset is in k . enable the ic turns on when a high signal is applied on the en pin, and turns off when this pin is pulled low. pwm dimming the A8507 has a very wide range for pwm signal input. it can accept a pwm signal from 100 hz to 5 khz. when a pwm high signal is applied, the ledx pins sink 100% current. when the pwm signal is low, the led sinks turn off. referring to figure 13, there is a ramp-up delay between when the pwm signal is applied and when the current reaches the 90% level. to improve current dimming linearity for pwm pulse widths less than 100 s, increase the applied pwm pulse-width by 3 s to compensate for this delay. startup sequence when en is pulled high, the ic enters soft start. the ic first tries to determine which ledx pins are being used, by raising the ledx pin voltage with a small current. after a duration of 512 switching cycles, the ledx pin voltage is checked. any ledx channel with a drain voltage smaller then 100 mv is removed from the control loop. after the first pwm positive trigger, the boost current is limited to 35% of normal value and all active ledx pins sink 1 / 12 of the set current until output voltage reaches sufficient regulation level. when the device comes out of soft start, boost current and the ledx pin currents are set to normal operating level. within a few cycles, the output capacitor charges to the voltage required to supply full ledx current. after output voltage, v out , reaches the required level, ledx current toggles between 0% and 100% with each pwm command signal. in case of a heavy overload on v out at startup, the device will stay in soft start mode indefinitely, as the output voltage cannot rise to the led regulation level. led short detect any ledx pins that have a voltage exceed- ing the short circuit detect voltage, v sc , cause the device to shut down and this condition is latched. this faults occurs when multiple leds short. in case only a few leds short, the ic will continue to work as long as power dissipation in the ic is limited. overvoltage protection the A8507 has an adjustable over- voltage protection feature to protect the external mosfet against output overvoltage. the overvoltage level can be set, from 36 v to a higher voltage, with an external resistor, r ovp . when the current though the ovp pin exceeds 240 a, internal ovp comparator goes high and the device shuts down. the ovp functional description t d pwm i led figure 13. propagation delay from the pwm signal rising edge to i ledx reaching the 90% level
led backlight driver for lcd monitors and televisions A8507 10 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com fault disables all ledx strings that are below regulation, thus pre- venting them from controlling the boost output voltage. calculate the value for r ovp ( ) as follows: r ovp = (v ovp ? 36) / 240 a , (3) where v ovp is the required ovp level in v. open led protection unused ledx pins should be connected to gnd. during normal operation, if any enabled led string opens, voltage on the corresponding ledx pin goes to zero. the boost loop operates in open loop till the ovp level is reached. the A8507 identifies the open led string when overvoltage is detected. open strings are then removed from the regulation loop. afterwards, the boost controller operates in normal manner, and the output voltage is regulated to drive the remaining strings. if the open led string is reconnected, it will sink current up to the programmed current level. note: open strings are removed from boost regulation, but not disabled. this keeps the string in operation if leds open for only a short length of time, or reach ovp level on a transient event. the disconnected string can be restored to normal mode by reen- abling the ic. it can also be restored to normal operation if the fault signal is removed from the corresponding ledx pin, but an ovp event occurs on any other ledx pin. overcurrent protection the ic provides pulse-by-pulse current limiting for the boost mosfet. the current limit level, i sc (a), can be set by selecting the external resistor, r sc ( ): r sc = 0.095 / i sc . (4) if the boost output voltage is unable to reach the regulation target even when the switch is operating at maximum current limit, the boost control loop will force the compensating capacitor, c comp , to rise in voltage until it reaches the overcurrent fault level (3.4v approximately). the overcurrent fault forces the device into soft start. channel selection the A8507 can be used to drive 1 to 6 led channels. during startup, the ic detects led sink pins which are shorted to ground, and disables the corresponding led channel. therefore, any unused led pins must be connected to ground, otherwise the ic will go into overvoltage protection fault during startup. led pins can be paralleled together for higher cur- rent. for example for a 3 parallel string configuration, connect led1-2, led3-4, and led5-6 together to deliver up to 160 ma per led. thermal shutdown (tsd) the ic shuts down when junction temperature exceeds 165c. it will recover automatically when the junction temperature falls below 125c. vin undervoltage lockout (uvlo) the device is shut down when input voltage, v in , falls below v uvlo . fault mode the ic functions in various fault states: fault state auto- restart description over- voltage protection yes fault occurs when ovp pin exceeds the v ovp threshold. used to protect the output voltage from damaging the part. pulse- by-pulse current limit yes fault occurs when the current through the external mosfet increases exceeds such that the voltage across the senp and senn pins exceeds 95 mv typical. the mosfet switch is turned off on a cycle-per-cycle basis. overcurrent protection yes fault occurs when the comp pin exceeds the overcurrent detect threshold. multiple pulse-by- pulse current limits will result in the comp pin voltage to rise. after a time period determined by the comp pin current and the output capacitor, c out , the comp voltage will exceed the overcurrent detect threshold, forcing a fault. over- temperature protection yes fault occurs when the die temperature exceeds the over-temperature threshold, 165c typical. led short protection no fault occurs when the led pin voltage exceeds v sc , 18.7 v typical. vin uvlo no fault occurs when vin drops below v uvlo , 4.0 v typical. this fault resets all latched faults.
led backlight driver for lcd monitors and televisions A8507 11 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com pcb layout guidelines as with any switching power supply, care should be taken in laying out the board. a switching power supply has sources of high dv/dt and high di/dt which can cause malfunction. all general norms should be followed for board layout. refer to figure 14 for a typical application schematic. the A8507 evaluation board provides a useful model for designing application circuit layouts. the following guidelines should be observed: ? place the supply bypass capacitor (c5) close to the vin pin and the ground plane. ? route analog ground, digital signal ground, led ground (lgnd pin), and power ground (pgnd pin) separately. con- nect all these grounds at the common ground plane under the A8507, serving as a star ground. ? place the input capacitors (c1, c2), inductor (l1), boost diode (d1), mosfet (q1), and output capacitors (c3, c4) so that they form the smallest loop practical. avoid long traces for these paths. ? place the resistors r fset and r iset , and the compensation com- ponents (rz and cz) close to the fset, iset, and comp pins, respectively. connect the other ends to the common star ground. ? A8507 has 50 k internal pull-down resistors on the en and pwm pins to keep these pins low while driving through tri-state state (for example, shutdown). add external resistors r2 and r3 between the en and pwm pins and ground, for added noise immunity. connect these resistors close to the pins and return to the common star ground. ? sense voltage across r sc with smaller length traces. place the senp and senn traces as close to each other as possible to minimize noise pickup. connect the senn trace to the negative end of the resistor and do not connect it to power ground plane. ? provide a substantial copper plane near mosfet q1 and the ic, to provide good thermal conduction. ? place r ovp as close as possible to the ovp pin. a long trace between r ovp and the ovp pin may pick up switching noises and cause overvoltage protection to trip prematurely. application information figure 14. typical application circuit fset driver vin pwm en senp senn led1 led2 led3 led4 led5 led6 v bat 8 to 21 v v bias 4.5 to 5.5 v 8 76 10 4 19 13 1 11 23 24 A8507 (lp package) comp iset nc nc nc gnd gnd lgnd pgnd r sc r ovp ovp v out 8 leds per string r3 r2, r3 optional (A8507 has internal pull-down resistors) r2 r fset r iset rz1 cz1 2 12 14 15 9 5 3 d1 q1 l1 fault pad p p c5 r1 c4 c3 p c2 c1 p 17 18 20 21 22 16
led backlight driver for lcd monitors and televisions A8507 12 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com figure 15. typical application with 6 parallel strings, 8 series leds each, 80 ma per channel figure 16. typical application with 2 parallel strings, 12 series leds each, 240 ma per channel fset driver vin pwm en senp senn led1 led2 led3 led4 led5 led6 v bat 8 to 21 v v bias 4.5 to 5.5 v 8 76 10 4 19 13 1 11 23 24 A8507 (lp package) comp iset nc nc nc gnd gnd lgnd pgnd r sc r ovp ovp v out 8 leds per string r3 r2, r3 optional (A8507 has internal pull-down resistors) r2 r fset r iset rz1 cz1 2 12 14 15 9 5 3 d1 q1 l1 fault pad p p c5 r1 c4 c3 p c2 c1 p 17 18 20 21 22 16 r2, r3 optional (A8507 has internal pull-down resistors) fset driver vin pwm en senp senn led1 led2 led3 led4 led5 led6 v bat 8 to 21 v v bias 4.5 to 5.5 v 8 10 4 19 13 1 11 23 24 A8507 (lp package) comp iset nc nc nc gnd gnd lgnd pgnd r sc r ovp ovp v out 12 leds per string r3 r2 r fset r iset rz1 cz1 2 12 14 15 9 5 3 d1 q1 l1 fault pad p p c5 r1 c4 c3 p c2 c1 p 76 17 18 20 21 22 16 12 v bat (v) 21 80 85 90 95 100 0 20406080100 e ? ciency (%) pwm duty cycle (%) 80 85 90 95 100 0 20406080100 e ? ciency (%) pwm duty cycle (%) 12 v bat (v) 21 r iset = 10.0 k , r fset = 51 k , r ovp = 0 , q1=fqb17n08l r iset = 10.0 k , r fset = 51 k , r ovp = 36 k , q1=fqb17n08l
led backlight driver for lcd monitors and televisions A8507 13 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com figure 17. typical application with 3 parallel strings, 12 series leds each, 160 ma per channel figure 18. typical application with 4 parallel strings, 12 series leds each, 80 ma per channel r2, r3 optional (A8507 has internal pull-down resistors) fset driver vin pwm en senp senn led1 led2 led3 led4 led5 led6 v bat 8 to 21 v v bias 4.5 to 5.5 v 8 10 4 19 13 1 11 23 24 A8507 (lp package) comp iset nc nc nc gnd gnd lgnd pgnd r sc r ovp ovp v out 12 leds per string r3 r2 r fset r iset rz1 cz1 2 12 14 15 9 5 3 d1 q1 l1 fault pad p c5 r1 p c4 c3 p c2 c1 p 76 17 18 20 21 22 16 r2, r3 optional (A8507 has internal pull-down resistors) fset driver vin pwm en senp senn led1 led2 led3 led4 led5 led6 v bat 8 to 21 v v bias 4.5 to 5.5 v 8 10 4 19 13 1 11 23 24 A8507 (lp package) comp iset nc nc nc gnd gnd lgnd pgnd r sc r ovp ovp v out 12 leds per string r3 r2 r fset r iset rz1 cz1 2 12 14 15 9 5 3 d1 q1 l1 fault pad p c5 r1 p c4 c3 p c2 c1 p 76 17 18 20 21 22 16 80 85 90 95 100 0 20406080100 e ? ciency (%) pwm duty cycle (%) 12 v bat (v) 21 80 85 90 95 100 0 20406080100 e ? ciency (%) pwm duty cycle (%) 12 v bat (v) 21 r iset = 10.0 k , r fset = 51 k , r ovp = 36 k , q1=fqb17n08l r iset = 10.0 k , r fset = 51 k , r ovp = 36 k , q1=fqb17n08l
led backlight driver for lcd monitors and televisions A8507 14 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com figure 19. typical application with 4 parallel strings, 18 series leds each, 80 ma per channel for higher output voltage, the voltage on the ledx pins during pwm off-time may exceed the rated voltage. connect a resistor from the ledx pin to gnd. recommended values are: ? c3 = 2.2 f / 100 v ceramic ? c4 = 10 f / 100 v electrolytic ? r4 through r7 = 25 k , 0603 r2, r3 optional (A8507 has internal pull-down resistors) fset driver vin pwm en senp senn led1 led2 led3 led4 led5 led6 v bat 8 to 21 v v bias 4.5 to 5.5 v 8 10 4 19 13 1 11 23 24 A8507 (lp package) comp iset nc nc nc gnd gnd lgnd pgnd r sc ovp v out 18 leds per string r3 r2 r fset r iset rz1 cz1 2 12 14 15 9 5 3 d1 d2 q1 l1 fault pad p c5 r1 p r7 r4 r5 r6 c4 c3 p c2 c1 p 76 17 18 20 21 22 16 80 85 90 95 100 0 20406080100 e ? ciency (%) pwm duty cycle (%) 12 v bat (v) 21 r iset = 10.0 k , r fset = 51 k , d2 = 30 v zener, q1=fqb17n08l
led backlight driver for lcd monitors and televisions A8507 15 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com package lb 24-pin soicw with internally fused pins c seating plane gauge plane seating plane a terminal #1 mark area b b pcb layout reference view 2 1 24 c seating plane c 0.10 24x 0.25 bsc 1.40 ref 2.65 max pins 6, 7, 18, and 19 internally fused for enhanced thermal dissipation for reference only; not for tooling use (reference ms-013ad) dimensions in millimeters dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown 15.40 0.20 7.50 0.10 10.30 0.33 0.30 0.10 0.33 0.20 1.27 0.40 8 0 a 1.27 bsc 0.51 0.31 2 1 24 reference pad layout (reference ipc soic127p1030x265-24m) all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and pcb layout tolerances 2.20 0.65 9.60 1.27 branded face
led backlight driver for lcd monitors and televisions A8507 16 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com copyright ?2009-2010, allegro microsystems, inc. the products described here are manufactured under one or more u.s. patents or u.s. patents pending. allegro microsystems, inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per- mit improvements in the per for mance, reliability, or manufacturability of its products. before placing an order, the user is cautioned to verify that the information being relied upon is current. allegro?s products are not to be used in life support devices or systems, if a failure of an allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. the in for ma tion in clud ed herein is believed to be ac cu rate and reliable. how ev er, allegro microsystems, inc. assumes no re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. for the latest version of this document, visit our website: www.allegromicro.com package lp 24-pin tssop with exposed thermal pad a 1.20 max 0.15 0.00 0.30 0.19 0.20 0.09 8o 0o 0.60 0.15 1.00 ref c seating plane c 0.10 24x 0.65 bsc 0.25 bsc 2 1 24 7.800.10 4.400.10 6.400.20 gauge plane seating plane a terminal #1 mark area b for reference only; not for tooling use (reference mo-153 adt) dimensions in millimeters dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown b exposed thermal pad (bottom surface); dimensions may vary with device 4.32 nom 3 nom 0.65 6.10 3.00 4.32 1.65 0.45 reference land pattern layout (reference ipc7351 tsop65p640x120-25m); all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and pcb layout tolerances; when mounting on a multilayer pcb, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference eia/jedec standard jesd51-5) pcb layout reference view c c

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